Tuning circuit

ABSTRACT

A tuning circuit which has a wide tuning bandwidth. The tuning bandwidth of the tuning frequency can be easily changed. The tuning circuit 1 is composed of two cascade-connected tuning amplifier sections 2 and 3. Each of the sections 2 and 3 is provided with cascade-connected phase-shifting circuits 10C and 30C, a voltage dividing circuit 60, and an adding circuit composed of a feedback resistor 70 and an input resistor 74. Prescribed tuning operation is performed by shifting the phase of a prescribed frequency by 360° by means of the phase shifting circuits 10C and 30C and setting the open loop gain of a feedback loop at less than 1 when the output of the voltage dividing circuit 60 is feedback. The resistance ratio between the feedback resistor 70 and input resistor 74 of each tuning amplifier section is adjusted in order that the maximum damping of each tuning amplifier section becomes smaller and the tuning bandwidth of each amplifier section becomes wider. Therefore, since the tuning amplifier sections are cascade-connected, the maximum damping is increased and the tuning bandwidth is widened as a whole.

TECHNICAL FIELD

The present invention relates to a tuning circuit easily adapted to anintegrated circuit and capable of selectively providing as an output anydesired frequency component in an input signal.

BACKGROUND OF ART

Generally, tuning circuits for receiving a video signal in a televisionreceiver and the like require to have a relatively wide frequencybandwidth and thus use, for example, staggered tuning amplifiers. Thestaggered tuning amplifiers are a combination of plural stages of singletuning circuits, each adapted to choose a narrow frequency bandwidthsignal, to provide a wide frequency bandwidth and a given amplificationfactor as a whole. Such amplifiers find wide applications not only inthe above mentioned television receivers but also in intermediatefrequency amplifiers for radar systems, etc.

A plurality of single tuning amplifiers constituting the above mentionedconventional staggered tuning amplifiers comprise a combination ofresonance circuits, each including typically an inductor and acapacitor. By shifting the resonance frequencies by a given frequencyfrom one another, a relatively flat, wide frequency bandwidth tuningcharacteristic may be obtained as a whole. Tuning frequencies in suchstaggered tuning amplifiers are determined by inductors and capacitorsto be used as pairs. However, any attempt to obtain a wide frequencybandwidth by combining, for example, two stages of single tuningamplifiers with a certain frequency difference may result in a non-flattuning characteristic with undesirable attenuation in the intermediateor center frequency range. This leads to a conclusion that the number ofcascade connected, single tuning amplifier stages must be increased forwider frequency characteristic. In varying tuning frequencies of threeor more stages of tuning amplifiers, the resonance frequency of eachsingle tuning amplifier must be controlled in harmony with those in theother amplifiers, thereby making the control very complicated andsubjecting to substantial change in characteristic when the tuningfrequencies are varied. This is believed to be the reason why the tuningfrequencies have never been varied in practical use. In a heterodynesystem, for example, signal is processed after being converted into anintermediate frequency and thus the tuning frequency is maintainedconstant.

DISCLOSURE OF INVENTION

It is the object of the present invention to solve the above problemsand to provide a tuning circuit having a wider tuning frequencybandwidth, capable of easily varying the tuning frequency bandwidth orthe tuning frequency, and suitable to adapt to an integrated circuit.

The tuning circuit in accordance with the present invention comprises aplurality of cascade connected tuning amplifier sections, each having asubstantially equal tuning frequency. Each of the tuning amplifiersections comprises an adding circuit for adding an input signal appliedto one end of an input impedance element and a feedback signal appliedto one end of a feedback impedance element, two phase shifting circuitsof opposite phase shift directions to each other and including a seriescircuit of a first resistor and a capacitor or an inductor and adifferential input amplifier, and a first voltage dividing circuit fordividing an input AC signal by a predetermined dividing ratio. The twophase shifting circuits and the first voltage dividing circuit areconnected in a cascade manner. The added signal from the adding circuitis applied to the front stage circuit of the cascade connected circuitsand the signal from the final stage is applied to one end of thefeedback impedance element as the feedback signal. An output signal isderived from a circuit point before being divided by the voltagedividing circuit.

Also, the tuning circuit according to the present invention comprises aplurality of cascade connected tuning amplifier sections havingsequentially different tuning frequencies by a given frequency. Each ofthe tuning amplifier sections comprises an adding circuit for adding aninput signal applied to one end of an input impedance element and afeedback signal applied to one end of a feedback impedance element, twophase shifting circuits of opposite phase shift directions to each otherand including a series circuit of a first resistor and a capacitor or aninductor and a differential input amplifier, and a first voltagedividing circuit for dividing an input AC signal by a predetermineddividing ratio. The two phase shifting circuits and the first voltagedividing circuit are connected in a cascade manner with the first stagecircuit of the cascade connected circuits receiving the added signalfrom the adding circuit while the output signal from the final stagecircuit applied to one end of the feedback impedance element as thefeedback signal. An output signal is derived from a circuit point beforebeing divided by the voltage dividing circuit.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram of the tuning circuit to which the presentinvention is applied.

FIG. 2 is a circuit schematic of each tuning amplifier section in FIG.1.

FIG. 3 is a circuit schematic of the phase shifting circuit at the firststage in FIG. 2.

FIG. 4 is a vector diagram showing the relationship between the inputand output voltages and the voltage across a capacitor and like in thephase shifting circuit as shown in FIG. 3.

FIG. 5 is a circuit schematic of the subsequent stage phase shiftingcircuit in FIG. 2.

FIG. 6 is a vector diagram showing the relationship between the inputand output voltages and the voltage across the capacitor and the like inthe phase shifting circuit as shown in FIG. 5.

FIGS. 7A, 7B and 7C show the phase relationship between the input andoutput signals of the two phase shifting circuits included in the tuningamplifier section.

FIG. 8 is a circuit schematic of the two phase shifting circuits and thevoltage dividing circuit included in the tuning amplifier sectionrepresented by a circuit having the equivalent transfer function.

FIG. 9 is a circuit schematic in FIG. 8 converted by the Miller'sprinciple.

FIG. 10 is a characteristic chart of the tuning amplifier section.

FIG. 11 is an overall characteristic chart of the tuning circuitcomprising two tuning amplifier sections of identical tuning frequencyto each other.

FIG. 12 is a characteristic chart of the tuning circuit comprising twotuning amplifier sections of different tuning frequencies.

FIG. 13 is a characteristic chart of the tuning circuit comprising threetuning amplifier sections of different tuning frequencies from oneanother.

FIG. 14 is a circuit schematic of a phase shifting circuit to bereplaced for the phase shifting circuit in FIG. 3.

FIG. 15 is a vector diagram showing the relationship between the inputand output voltages and the voltage across the inductor and the like inthe phase shifting circuit in FIG. 14.

FIG. 16 is a circuit schematic of a phase shifting circuit capable ofreplacing the phase shifting circuit in FIG. 5.

FIG. 17 is a vector diagram showing the relationship between the inputand output voltages and the voltage across the inductor and the like inthe phase shifting circuit as shown in FIG. 16.

FIG. 18 is a circuit schematic of an alternative tuning amplifiersection.

FIG. 19 is a circuit schematic of still another tuning amplifiersection.

FIG. 20 is a circuit schematic of yet another tuning amplifier section.

FIG. 21 is a generalized circuit schematic of the phase shiftingcircuits in the tuning amplifier section as shown in FIG. 20.

FIG. 22 is a circuit schematic of an alternative phase shifting circuitto the one in the front stage in FIG. 20.

FIG. 23 is a circuit schematic of an alternative phase shifting circuitto the one in the output stage in FIG. 20.

FIG. 24 is a circuit schematic of still another tuning amplifiersection.

FIG. 25 is an example of a variable inductor.

FIG. 26 shows the inductor conductor of the variable inductor in FIG. 25and control conductors in greater detail.

FIG. 27 is a magnified cross section view along line A--A in FIG. 26.

FIG. 28 is another example of a variable inductor.

FIG. 29 is a circuit schematic of a capacitance converter circuit tomagnify apparent capacitance of a capacitor.

FIG. 30 is a diagram of the circuit in FIG. 29 using a transferfunction.

FIG. 31 is a diagram of the circuit in FIG. 30 converted by using theMiller's principle.

FIG. 32 is a circuit schematic of an inductance converter circuit tomagnify apparent inductance of an inductor.

FIG. 33 is a circuit schematic of an important circuit in an operationalamplifier operating as a phase shifting circuit.

BEST MODE FOR CARRYING OUT THE INVENTION

FIG. 1 is a block diagram to show the principle of one embodiment of thetuning circuit to which the present invention is applied. The tuningcircuit 1 in FIG. 1 comprises a cascade connection of a first tuningamplifier section 2 and a second tuning amplifier section 3.

The tuning frequency of the first tuning amplifier section 2 is set tof1 for extracting or picking up only signal components of the inputsignal applied to the input terminal whose frequency is close to f1.While the second tuning amplifier section 3 is set to f2 in the tuningfrequency for providing from the output terminal signal components fromthe first tuning amplifier section 2 having frequency close to f2. Notethat the tuning frequencies f1, f2 of the first and second tuningamplifier sections 2, 3 are set substantially equal (including exactlyequal) to each other. (First Embodiment of the Tuning Amplifier Section)

Illustrated in FIG. 2 is a circuit schematic of one tuning amplifiersection 2 mentioned above. It is to be noted that the other tuningamplifier section 3 may have the same construction.

The tuning amplifier section 2 in FIG. 2 includes two phase shiftingcircuits 10C, 30C for shifting the phase of the AC signal appliedthereto by a certain phase angle to provide 360° overall phase shift ata certain frequency, a voltage dividing circuit 60 comprising resistors62, 64 connected to the output of the subsequent stage phase shiftingcircuit 30C, and an adding circuit to add with a predetermined ratio thedivided output (feedback signal) from the voltage dividing circuit 60and the signal (input signal) applied to the input terminal 90 by way ofa feedback resistor 70 and an input resistor 74, respectively. (Notethat the input resistor 74 has n-times of resistance of the feedbackresistor 70.)

FIG. 3 shows only the front or preceding stage of the phase shiftingcircuit 10C in FIG. 2, which comprises an operational amplifier 12 in aform of a differential input amplifier, a variable resistor 16 and acapacitor 14 for shifting the phase of an input AC signal applied to aninput terminal 24 before being applied to the non-inverting inputterminal of the operational amplifier 12, a resistor 18 interposedbetween the input terminal 24 and an inverting input terminal of theoperational amplifier 12, resistors 21, 22 defining a voltage dividingcircuit connected to the output terminal of the operational amplifier12, and a resistor 20 interposed between the voltage dividing circuitand the inverting input terminal of the operational amplifier 12.

In the phase shifting circuit 10C as configured above, the resistors 18,20 are chosen to have equal resistance to each other.

When an AC signal is applied to the input terminal 24 in FIG. 3, appliedto the non-inverting input terminal of the operational amplifier 12 isthe voltage VC1 appearing across the capacitor 14. Note that nopotential difference does exist between the two input terminals of theoperational amplifier 12, thereby equalizing the potential on theinverting input terminal of the operational amplifier 12 and thepotential on the junction of the variable resistor 16 and the capacitor14. Consequently, the voltage across the resistor 18 is equal to thevoltage VR1 across the variable resistor 16.

It is to be noted that the same current I flows through both resistors18, 20 which have equal resistance as described above. This means thatthe same voltage VR1 develops across the resistor 20. The voltage VR1across each of the two resistors 18, 20 has the same vector. Withreference to the voltage VC1 on the non-inverting input terminal of theoperational amplifier 12, vector summation of the voltage VR1 across theresistor 18 defines the input voltage Ei while vector subtraction of thevoltage VR1 across the resistor 20 defines the voltage Eo' (output fromthe voltage dividing circuit) on the junction of the resistors 21, 23.

The output from the phase shifting circuit 10C is derived directly fromthe output terminal of the operational amplifier 12 rather than throughthe voltage dividing circuit comprising the above mentioned resistors21, 23.

Illustrated in FIG. 4 is a vector diagram showing the relationshipbetween the input and output voltages of the front stage phase shiftingcircuit 10C and the voltage across the capacitor.

As shown in FIG. 4, the voltage VC1 across the capacitor 14 and thevoltage VR1 across the variable resistor 16 are 90° out of phase fromeach other. Vector summation (addition) of VC1 and VR1 leads to theinput voltage Ei. As the frequency varies while maintaining the inputsignal amplitude constant, the voltage VC1 across the capacitor 14 andthe voltage VR1 across the variable resistor 16 vary along the smallestsemicircle in FIG. 4.

On the other hand, vector subtraction of the voltage VR1 from thevoltage VC1 gives the divided output Eo'. With reference to the voltageVC1 on the non-inverting input terminal of the operational amplifier 12,both input voltage Ei and divided output Eo' are obtained by vectorsummation of the same voltage VR1 in opposite directions to each otherand have equal absolute value to each other. As a result, magnitude andphase relationship between the input voltage Ei and the divided outputEo' can be represented by an isosceles triangle with the input voltageEi and the divided output Eo' as two equal sides and twice of thevoltage VR1 as the base. The amplitude of the divided output Eo' isequal to that of the input signal regardless of the frequency. Theamount of phase shift is represented by φ 1 in FIG. 4.

Also, as apparent from FIG. 4, both voltages VC1 and VR1 cross at aright angle on the circumference. Theoretically the phase differencebetween the input voltage Ei and the voltage VC1 varies from 0° to 90°as the frequency ω varies from 0 to ∞. Since the overall phase shift φ 1of the phase shifting circuit 10C is twice as large as the above phaseshift, or varies from 0° to 180° in response to the frequency. Moreover,the phase shift φ 1 can be varied by varying the resistance R of thevariable resistor 16.

Also, since the output terminal 26 of the phase shifting circuit 10C isconnected to the output terminal of the operational amplifier 12, thereis the following relationship between the output voltage Eo and theabove mentioned divided output Eo' if the resistance R21 of the resistor21 and the resistance R23 of the resistor 23 are sufficiently small ascompared with the resistance of the resistor 20:

    Eo=(1+R21/R23)Eo'

This suggests that the gain can be set to larger than 1 by adjusting R21and R23. Additionally, the amplitude of the output voltage Eo remainsconstant as the frequency varies and the phase angle can be shifted asshown in FIG. 4.

Now, illustrated in FIG. 5 is an extraction of the subsequent stagephase shifting circuit 30C in FIG. 2. The subsequent stage phaseshifting circuit 30C in FIG. 5 comprises an operational amplifier 32 asa differential input amplifier, a capacitor 34 and a variable resistor36 for shifting the phase of the input signal applied to an inputterminal 44 before being applied to the non-inverting input terminal ofthe operational amplifier 32, a resistor 38 interposed between the inputterminal 44 and the inverting input terminal of the operationalamplifier 32, resistors 41, 43 defining a voltage dividing circuit to beconnected to the output terminal of the operational amplifier 32 and aresistor 40 interposed between the voltage dividing circuit and theinverting input of the operational amplifier 32.

The resistors 38 and 40 in the above phase shifting circuit 30C arechosen to be equal to each other.

When an input AC signal is applied to the input terminal 44 in FIG. 5,applied to the non-inverting input terminal of the operational amplifier32 is the voltage VR2 across the variable resistor 36. Note that thereis no potential difference between the two input terminals of theoperational amplifier 32, thereby equalizing the potential on thejunction point of the capacitor 34 and the variable resistor 36 and thepotential on the inverting input terminal of the operational amplifier32. This means that the voltage across the resistor 38 is equal to thevoltage VC2 across the capacitor 34.

Note that the same current I flows through the two resistors 38, 40which have equal resistance to each other as mentioned above, therebydeveloping the voltage VC2 across the resistor 40. Since the voltage VC2across the two resistors 38, 40 have the same vector. With reference tothe inverting input terminal (voltage VR2) of the operational amplifier32, vector summation of the voltage VC2 across the resistor 38 providesthe input voltage Ei while vector subtraction of the voltage VC2 acrossthe resistor 40 provides the voltage (divided output) Eo' on thejunction of the resistors 41, 43.

Again, the output voltage Eo of the phase shifting circuit 30C isderived from the output terminal 46 of the operational amplifier 32rather than through the voltage dividing circuit comprising theresistors 41, 43.

FIG. 6 is a vector diagram showing the relationship between the inputand output voltages and the voltage across the capacitor in thesubsequent stage phase shifting circuit 30C.

As shown in FIG. 6, the voltage VR2 across the variable resistor 36 is90° out of phase with respect to the voltage VC2 across the capacitor34. Vector summation of these voltage VR2, VC2 provides the inputvoltage Ei. As a result, when the frequency is varied while the inputsignal amplitude remains constant, the voltage VR2 across the variableresistor 36 and the voltage VC2 across the capacitor 34 vary along thecircumference of the semi-circle as shown in FIG. 6.

On the other hand, vector subtraction of the voltage VC2 from thevoltage VR2 provides the divided output Eo'. With reference to thevoltage VR2 to be applied to the non-inverting input terminal, the inputvoltage Ei and the divided output Eo' are different from each other onlyin the polarity of vector combination of the voltage VC2 and thus areequal in absolute value. As a result, the relationship in magnitude andphase relationship of the input voltage Ei and the divided output Eo'can be represented by an isosceles triangle with the input voltage Eiand the divided output Eo' as two equal sides and with twice of thevoltage VC2 as the base. The amplitude of the divided output Eo' isequal to that of the input signal regardless of the frequency. The phaseshift is represented by φ 2 as shown in FIG. 6.

Also, as apparent from FIG. 6, since the voltage VR2 and the voltage VC2cross at right angle on the circumference, the phase difference betweenthe input voltage Ei and the voltage VR2 varies theoretically from 90°to 0° as the frequency ω varies from 0 to ∞. The phase shift φ 2 of theentire phase shifting circuit 30C is twice as large as the above angle,thereby varies from 180° to 0° depending on the frequency. Moreover, thephase shift φ 2 can be controlled by varying the resistance R of thevariable resistor 36.

Also, since the output terminal 46 of the phase shifting circuit 30C isconnected to the output terminal of the operational amplifier 32, thereis the following relationship between the output voltage Eo and theabove mentioned divided output Eo' if the resistance R41 of the resistor41 and the resistance R43 of the resistor 43 are sufficiently small ascompared with the resistance of the resistor 40:

    Eo=(1+R41/R43)Eo'

This suggests that the gain can be set to larger than 1 by adjusting R41and R43. Additionally, the amplitude of the output voltage Eo remainsconstant as the frequency varies and the phase angle can be shifted asshown in FIG. 6.

In this manner, the phase shift takes place in each of the two phaseshifting circuits 10C, 30C. As shown in FIGS. 4 and 6, relative phaserelationship between the input and output voltages in the phase shiftingcircuits 10C, 30C is opposite to each other and the total phase shift ofthe two phase shifting circuits 10C, 30C is 360° at a certain frequency.

The output from the subsequent stage phase shifting circuit 30C isderived from the tuning amplifier section 2 at the output terminal 92.The output from the phase shifting circuit 30C is divided by the voltagedividing circuit 60 before being fed back to the input side of the frontstage phase shifting circuit 10C by way of the feedback resistor 70. Thefeedback signal and the input signal applied by way of the inputresistor 74 are added together before being applied to the front stagephase shifting circuit 10C.

As described hereinbefore, the total phase shift of the two phaseshifting circuits 10C, 30C is equal to 360° at a certain frequency. Ifthe open loop gain of the two phase shifting circuits 10C, 30C, thevoltage dividing circuit 60 and the feedback resistor 70 to 1 or lower,only the aforementioned frequency component is permitted to pass,thereby achieving the intended tuning operation.

Note that derived from the output terminal 92 of the tuning amplifiersection 2 is the output from the phase shifting circuit 30C before beingdivided by the voltage dividing circuit 60. This means that the tuningamplifier section 2 provides a gain to amplify the signal simultaneouslywith tuning operation.

Now, the phase angles φ 1 and φ 2 as shown in FIGS. 4 and 6 are given bythe following expressions (1) and (2):

    φ1=tan {2ωT.sub.1 /(1-ω.sup.2 T.sub.1.sup.2)}(1)

    φ2=-tan {2ωT.sub.2 /(1-ω.sup.2 T.sub.2.sup.2)}(2)

where, T₁ and T₂ are time constants of the CR circuits in the phaseshifting circuits 10C, 30C. "-" sign is used to represent the phaseangle φ 2 in FIG. 6 with respect to the phase angle φ 1 in FIG. 4.

In case of, for example, T₁ =T₂ (=T), the total phase shift of the twophase shifting circuits 10C, 30C is equal to 360° to achieve theaforementioned tuning operation when ω=1/T. At this point, φ 1=90° and φ2=-90°.

Although the phase of the output voltage Eo is shown to lead the inputvoltage Ei in the subsequent stage phase shifting circuit 30C in FIG. 6,it is to be noted that the output signal is in fact lagging with respectto the input signal.

Illustrated in FIG. 7 are phase relationships between input and outputsignals to the two phase shifting circuits 10C, 30C. In the shownexample, applied to the front stage phase shifting circuit 10C is theinput signal having the frequency equal to the tuning frequency and thetime constants T₁, T₂ of the phase shifting circuits 10C, 30C are equalto each other.

As shown in FIG. 7(A), the front stage phase shifting circuit 10Cprovides the output signal S2 with phase shift of the φ 1 (=90°) withrespect to the input signal S1.

In the subsequent stage phase shifting circuit 30C as shown in FIG.7(B), the output signal S3 is shifted by φ 2 with respect to the inputsignal S2 (equal to the output signal from the front stage phaseshifting circuit 10C). The output signal S3 appears to lead the inputsignal S2 by 90° but is in fact inverted and lagged by 90°, therebylagging φ 2'=270°.

As a result, in case of cascade connection of the two phase shiftingcircuits 10C, 30C as shown in FIG. 7(C), the overall phase shift will be360° by summing the aforementioned φ 1=90° and φ'2=270°.

Illustrated in FIG. 8 is a system diagram of the above mentioned twophase shifting circuits 10C, 30C and the voltage dividing circuit 60replaced by the transfer function K1. A circuit having the transferfunction K1 is paralleled with the feedback resistor 70 having aresistance R0 and connected to the input resistor 74 having a resistanceequal to n times of R0 (=nR0). Also illustrated in FIG. 9 is a systemdiagram of the system in FIG. 8 converted by using the Miller'sprinciple. The overall transfer function A of the converted system isgiven by the following expression (3):

    A=Vo/Vi=K1/{n(1-K1)+1}                                     (3)

The transfer function K2 of the front stage phase shifting circuit 10Cis given by the following expression (4):

    K2=a.sub.1 (1-T.sub.1 s)/(1+T.sub.1 s)                     (4)

Where, T₁ is the time constant of the CR circuit defined by the variableresistor 16 and the capacitor 14 (let the resistance of the variableresistor 16 be R and the capacitance of the capacitor 14 be C, T₁ =CR),s=j ω and a₁ is the gain of the phase shifting circuit 10C, thereby a₁=(1+R21/R23)>1.

Also, the transfer function K3 of the subsequent stage phase shiftingcircuit 30C is given by the following expression (5):

    K3=-a.sub.2 (1-T.sub.2 s)/(1+T.sub.2 s)                    (5)

Where, T₂ is the time constant of the CR circuit comprising thecapacitor 34 and the variable resistor 36 (let the capacitance of thecapacitor 34 be C and the resistance of the variable resistor 36 be R,T₂ =CR), and a₂ is the gain of the phase shifting circuit 30C, therebya₂ =(1+R41/R43)>1.

Assuming that the signal amplitude is attenuated by 1/a₁ a₂ by way ofthe voltage dividing circuit 60, the overall transfer function K1 of thecascade connected circuit of the two phase shifting circuits 10C, 30Cand the voltage dividing circuit 60 is given by the following expression(6):

    K1=-{.sup.∫ 1+(Ts).sup.2 -2Ts}/{1+(Ts).sup.2 +2Ts}    (6)

Note that both time constants T₁ and T₂ of the phase shifting circuitsare considered to be equal to T in the above expression (6) forsimplicity. A combination of the above expressions (6) and (3) leads tothe following expression (7): ##EQU1##

According to the expression (7), the maximum attenuation A=-1/(2n+1) isachieved at ω=0 (DC domain ). Also, A=-1/(2n+1) at ω=∞. At the tuningpoint of ω=1/T (if the time constants of the phase shifting circuitsdiffer, the tuning point ω=1/√(T₁ ·T₂) ), A=1 independent of theresistance ratio n of the feedback resistor 70 and the input resistor74. In other words, the tuning point and the attenuation at the tuningpoint remain unchanged as the resistance ratio n is varied as shown inFIG. 10.

Since the maximum attenuation depends on the resistance ratio n of thefeedback resistor 70 and the input resistor 74, the maximum attenuationis unaffected by the resistances of the variable resistors 16, 36 in thephase shifting circuits 10C, 30C for controlling the tuning frequency,thereby enabling to adjust the tuning frequency and the maximumattenuation without interference therebetween.

Also, since the resistors 18, 20 in the phase shifting circuit 10C areset to equal to each other and similarly the resistors 38, 40 in thephase shifting circuit 30C equal to each other, it is possible to obtainthe tuned output of substantially constant amplitude by preventing theamplitude from fluctuating when the tuning frequency in each tuningamplifier section is varied.

Particularly important is the fact that the resistance ratio n can beincreased to increase the quality factor Q of the tuning amplifiersection 2 while suppressing amplitude fluctuation in the tuned output.In other words, if there is frequency dependency in the open loop gain,even choosing a large resistance ratio n does not help to increase Q inlower gain frequencies and there is a possibility of increasing the openloop gain greater than 1 to cause oscillation in higher gainfrequencies. As a result, the resistance ratio n cannot be set too highto prevent such oscillation in high amplitude fluctuation, therebyrequiring to set the Q in the tuning amplifier section 2 to relativelylow. Alternatively, the amplitude fluctuation in the tuned output fromthe tuning amplifier section 2 can be suppressed by connecting thevoltage dividing circuits in the phase shifting circuits 10C, 30C,thereby making it possible to set the resistance ratio n high and thequality factor Q of the tuning amplifier section 2 high.

Since the tuning circuit 1 as shown in FIG. 1 comprises theaforementioned two tuning amplifier sections 2, 3 connected in a cascademanner, the tuning frequencies of the two tuning amplifier sections canbe set to equal to each other or can be shifted by a certain frequency.

Illustrated in FIG. 11 are characteristic curves of the tuning circuit 1including two cascade connected tuning amplifier sections set to equaltuning frequency. The characteristic curve a (dotted line) is for thefirst or second tuning amplifier section 2, 3 with the resistance ration equal to "10". The characteristic curve b (solid line) is for theoverall tuning circuit 1 of the present embodiment including the cascadeconnected tuning amplifier sections 2, 3. For reference, represented bythe characteristic curve c (single chain line) is a tuningcharacteristic of a single tuning amplifier section 2 (or 3) to havesubstantially similar maximum attenuation as the tuning circuit 1according to the present embodiment. Apparently, the tuning frequencybandwidth is narrower than that of the tuning circuit 1 according to thepresent embodiment.

As apparent from comparison between FIGS. 10 and 11, a cascadeconnection of two tuning amplifier sections 2, 3 with relatively smallresistance ratio n between the feedback resistor 70 and the inputresistor 74 to provide lower maximum attenuation will provide largermaximum attenuation and wider tuning frequency bandwidth as a whole.

Particularly, according to the tuning characteristic in FIG. 11, thetuning frequency bandwidth with the maximum attenuation of each tuningamplifier section 2, 3 set to about 1/2 is considerably wider thantwice. Accordingly, in the present embodiment including two tuningamplifier sections with their maximum attenuation set to about 1/2, itis possible to obtain a tuning circuit 1 having wider frequencybandwidth while maintaining the maximum attenuation unchanged. It is tobe noted here that the maximum attenuation of each tuning amplifiersection can be set to about 1/2 equally or different resistance ratio nmay be set to provide different attenuations so that the overallattenuation will be the intended value.

Although two tuning amplifier sections 2, 3 are cascade connected in theaforementioned tuning circuit 1, more than two tuning amplifier sectionsof substantially equal tuning frequency can be connected in a cascademanner. In such example, the maximum attenuation of each tuningamplifier section can be lower and the tuning frequency bandwidth can bebroader to obtain an overall tuning circuit having wider tuningfrequency bandwidth by combining these characteristic curves.

Although the tuning frequency of the two tuning amplifier sections 2, 3are equalized in FIG. 11, tuning frequencies of the tuning amplifiersections 2, 3 may be shifted each other by a given frequency. In suchexample cascade connection of two relatively low maximum attenuation,wider tuning frequency bandwidth tuning amplifier sections 2, 3 helps toprovide a targeted maximum attenuation and wider tuning frequencybandwidth as a whole. In particular, unlike conventional staggeredtuning amplifier circuit, each tuning amplifier section 2, 3 has a widertuning frequency bandwidth, thereby enabling to minimize the number ofcascade connected tuning amplifier sections.

Now, illustrated in FIG. 12 are characteristic curves of the tuningcircuit 1 comprising two cascade connected tuning amplifier sectionshaving shifted tuning frequencies from each other. In one example, thetuning frequency of the tuning amplifier section 2 is shifted slightlylower than the center frequency of 450 kHz while that of the tuningamplifier section 3 is shifted slightly higher than 450 kHz. In FIG. 12,represented by the vertical axis is attenuation (dB) and the horizontalaxis is input signal frequency. Also represented by B is the differencefrom the center frequency (450 kHz). For example, B=0 means that thetuning frequencies of the two tuning amplifier sections 2, 3 are equalto the center frequency while B=0.02 means that the tuning frequency ofthe tuning amplifier section 2 is 2% lower than 450 kHz and that of thetuning amplifier section 3 is 2% higher than 450 kHz.

As apparent from FIG. 12, the attenuation characteristic curve near thetuning point is generally flat when the tuning frequencies of the twotuning amplifier sections 2, 3 are shifted by predetermined amount.Also, the frequency bandwidth can be set to desired value by adjustingthe amount of shift, thereby increasing or decreasing the flat area. Itis to be noted, however, that shifting the tuning frequencies of the twotuning amplifier sections 2, 3 causes attenuation near the tuningfrequency, thereby attenuating the signal amplitude. In such a case, anamplifier may be connected at the subsequent stage to the tuning circuit1 in order to compensate for the attenuated signal amplitude.

Illustrated in FIG. 13 are characteristic curves of the tuning circuithaving three cascade connected tuning amplifier sections. In oneexample, the tuning frequency of the third stage tuning amplifiersection is set to 450 kHz, that of the first stage tuning amplifiersection is set to slightly lower than 450 kHz, and that of the secondstage tuning amplifier section is set to slightly higher than 450 kHz.

As apparent from FIG. 12, in case of the tuning circuit comprising twocascade connected tuning amplifier sections, there is an increasingamount of attenuation near the center frequency as the tuning frequencydifference of the two tuning amplifier sections increases. On thecontrary, in a tuning amplifier section comprising three cascadeconnected tuning amplifier sections as shown FIG. 13, there causes lessattenuation near the center frequency. It is therefore advantageous tocascade connect three or more tuning amplifier sections in order tosecure a wider frequency bandwidth.

As understood from the foregoing description, the frequency bandwidthcan be set wider by cascade connecting two or more tuning amplifiersections with their tuning frequencies identical to or shifted from eachother, thereby enabling to apply to television tuners, etc. It is to benoted that a trap circuit may be incorporated with the tuning circuit 1,if necessary, in order to apply it to television tuners, etc.

Since the tuning frequency can be easily adjusted by controlling theresistance of the variable resistors 16, 36 in the phase shiftingcircuits 10C, 30C of two (or more) tuning amplifier sections 2, 3constituting the tuning circuit 1, it is easy to achieve a variablefrequency tuning circuit 1.

It is also noted that the tuning amplifier sections 2, 3 constitutingthe tuning circuit 1 can be constructed by a combination of differentialamplifiers, capacitors and resistors which can be fabricated on asemiconductor substrate. This suggests that the entire circuit of thetuning circuit 1 can be easily fabricated on a semiconductor substrateas an integrated circuit.

Although two or more tuning amplifier sections are directly connectedwithout any intervening element in the present embodiment, it isappreciated that a buffer circuit may be interposed between adjacenttuning amplifier sections in order to prevent interference.Alternatively, an amplifier may be interposed between adjacent tuningamplifier sections. Interposing such amplifier may help to make thecharacteristic curves, for example, in FIG. 13 more flat near the tuningpoint.

Although the tuning amplifier section 2 (or 3) in FIG. 2 includes CRcircuits in the phase shifting circuits 10C, 30C, such CR circuits maybe replaced by LR circuits each comprising a resistor and an inductor.

Illustrated in FIG. 14 is a circuit schematic of a phase shiftingcircuit including an LR circuit, which can be replaced for the frontstage phase shifting circuit 10C in the tuning amplifier section 2 asshown in FIG. 2. The phase shifting circuit 10L as shown in FIG. 14 isderived from the phase shifting circuit 10C in FIG. 3 by replacing theCR circuit of the capacitor 14 and the variable resistor 16 by the LRcircuit of a variable resistor 16 and an inductor 17.

Illustrated in FIG. 15 is a vector diagram showing the relationshipbetween the input and output voltages of the phase shifting circuit 10Land the voltage across the inductor. As shown in FIG. 15, the voltageVR3 across the variable resistor 16 and the voltage VL1 across theinductor 17 are 90° phase shifted with each other. Vector summation ofVR3 and VL1 is the input voltage Ei. As a result, in case of the inputsignal of constant amplitude and variable in frequency, the voltage VR3across the variable resistor 16 and the voltage VL1 across the inductor17 more along the semi-circle as shown in FIG. 15.

On the other hand, vector subtraction of VL1 from VR3 is the dividedoutput Eo'. With reference to the voltage VR3 to be applied to thenon-inverting input terminal of the operational amplifier 12, the inputvoltage Ei and the divided output Eo' differ only in the direction ofcombining the voltage VL1 and have equal absolute value. As a result,the magnitude and phase relationship of the input voltage Ei and thedivided output Eo' can be represented by an isosceles triangle with theboth input voltage Ei and the divided output Eo' as the two equal sidesand twice of the voltage VL1 as the base. The amplitude of the dividedoutput Eo' is equal to the amplitude of the input signal regardless ofthe frequency and the phase shift can be represented by φ 3 in FIG. 15.

Also, as apparent from FIG. 15, the voltage VR3 and VL1 cross at rightangle on the circle, thereby theoretically providing from 0° to 90°phase angle between the input voltage Ei and the voltage VR3 as thefrequency ω varies from 0 to ∞. Since the overall phase shift φ 3 of thephase shifting circuit 10L is twice as large as the above and variesfrom 0° to 180° in response to the frequency.

The output terminal 26 of the phase shifting circuit 10L is connected tothe output terminal of the operational amplifier 12. As a result, therelationship between the output voltage Eo and the divided output Eo' isEo=(1+R21/R23) Eo', where R21 and R23 represent resistances of theresistors 21 and 23, respectively. This means that the gain can be setto greater than 1 by adjusting R21 and R23. The amplitude of the outputvoltage Eo remains constant and only phase changes when frequency variesas shown in FIG. 15.

Incidentally, the transfer function of the phase shifting circuit 10L asshown in FIG. 14 is the same as K2 in the above expression (4), whereinthe time constant T₁ of the LR circuit comprising the inductor 17 andthe variable resistor 16 is equal to L/R (i.e., T₁ =L/R). L and Rrepresent the inductance of the inductor 17, and the resistance of thevariable resistor 16, respectively. Also, the phase shift φ 3 is thesame as φ 1 given by the above expression (1) if the above time constantT₁ is used.

Now, illustrated in FIG. 16 is a circuit schematic of another example ofa phase shifting circuit including an LR circuit, which can be replacedfor the subsequent stage phase shifting circuit 30C in the tuningamplifier section 2 in FIG. 2. The phase shifting circuit 30L in FIG. 16is equal to the phase shifting circuit 30C in FIG. 5 if the CR circuitof the variable resistor 36 and the capacitor 34 is replaced by an LRcircuit comprising the inductor 37 and the variable resistor 36.

Illustrated in FIG. 17 is a vector diagram showing the relationshipbetween the input and output voltage of the phase shifting circuit 30Land the voltage across the inductor. The voltage VL2 across the inductor37 and the voltage VR4 across the variable resistor 36 are 90° phaseshifted with each other. A vector summation of VL2 and VR4 is the inputvoltage Ei. When the input signal frequency varies while maintaining itsamplitude constant, the voltage VL2 across the inductor 37 and thevoltage VR4 across the variable resistor 36 move along the semicircle.

On the other hand, the divided output Eo' is a vector subtraction of thevoltage VR4 from the voltage VL2. With reference to the voltage VL2applied to the non-inverting input terminal, the input voltage Ei andthe divided output Eo' are equal in absolute value but differ in thedirection of combining the voltage VR4. As a result, the amplitude andphase relationship between the input voltage Ei and the divided outputEo' can be represented by an isosceles triangle with Ei and Eo' as thetwo equal sides and twice of the voltage VR4 as the base. The amplitudeof the divided output Eo' is the same as that of the input signalregardless of the frequency and the phase shift is represented by φ 4 inFIG. 17.

As apparent from FIG. 17, the voltages VL2 and VR4 cross at right angleon the circular circumference, therefore the phase difference betweenthe input voltage Ei and the voltage VL2 varies theoretically from 90°to 0° as the frequency ω varies from 0 to ∞. The overall phase shift φ 4of the phase shifting circuit 30L is twice as large as the above phaseangle and varies from 180° to 0°.

Again, since the output terminal 46 of the phase shifting circuit 30L isconnected to the output terminal of the operational amplifier 32, therelationship between the output voltage Eo and the divided output Eo' isEo=(1+R41/R43) Eo', where R41 and R43 represent the resistances of theresistors 41 and 43, respectively. This suggests that adjustment of R41and R43 will provide any gain greater than 1 and the output voltage Eoremains constant while phase is shifted by predetermined amount as thefrequency varies as illustrated in FIG. 17.

Incidentally, the transfer function of the phase shifting circuit 30L inFIG. 16 is given by the K3 in the expression (5) and the phase shift φ 4is the same as φ 2 given by the above expression (2) if the timeconstant T₂ of the LR circuit comprising the variable resistor 36 andthe inductor 37 is L/R (i.e., T₂ =L/R, where R and L represent theresistance of the variable resistor 36 and the inductance of theinductor L, respectively).

As understood from the foregoing description, the phase shiftingcircuits 10L and 30L as shown in FIGS. 14 and 16 are equivalent to thephase shifting circuits 10C and 30C as shown in FIGS. 3 and 5,respectively. It is therefore possible to replace the front stage phaseshifting circuit 10C and the subsequent stage phase shifting circuit 30Cof the tuning amplifier section 2 can be replaced by the phase shiftingcircuits 10L and 30L as shown in FIGS. 14 and 16, respectively.

Now, the tuning frequency of the two phase shifting circuits 10L, 30L isdetermined by the time constants of the LR circuits included in thephase shifting circuits 10L and 30L. The time constant is for exampleL/R and the tuning frequency ω of the tuning amplifier section includingthe two phase shifting circuits 10L, 30L is proportional to 1/T=R/L. Itis to be noted, here, that the inductor comprising the LR circuit can beformed on a semiconductor substrate by a spiral conductor made byphotoetching or other technology. The use of such particular inductormakes it possible to fabricate the entire tuning amplifier section on asemiconductor substrate as an integrated circuit.

However, since the inductance of such inductor is fairly small, thetuning frequency becomes high. In other words, the tuning frequency ofthe tuning amplifier section is proportional to the inverse R/L of thetime constant of the LR circuits in, for example, the phase shiftingcircuits 10L, 30L. The inductance L can be small by integrated circuittechnology, thereby enabling to choose a high tuning frequency byforming the entire tuning amplifier section including the two phaseshifting circuits 10L, 30L in an integrated circuit.

It is also possible in the tuning amplifier section 2 as shown in FIG. 2to replace either one of the phase shifting circuits 10C, 30C by thephase shifting circuit 10L or 30L as shown in FIG. 14 or 16. Inparticular, integrating such tuning amplifier section is effective forpreventing the tuning frequency from varying due to temperature changes,thereby providing temperature compensation. More in detail, the timeconstant T of a CR circuit is equal to CR while that of an LR circuit isequal to L /R. The resistance R are in the numerator and denominator,respectively. In case of forming the resistors for the CR and LRcircuits by using the semiconductor material by integrated circuittechnology, the tuning frequency fluctuation due to temperaturecharacteristic of such resistors is effectively restricted.

In the tuning amplifier section in FIG. 2, connected to the subsequentstage of the two phase shifting circuits 10C, 30C is the voltagedividing circuit 60 for feeding back the output from the voltagedividing circuit 60 by way of the feedback resistor 70, thereby settingthe overall gain of the tuning amplifier section greater than 1. Bysetting the dividing ratio of the voltage dividing circuit 60 to 1 orremoving the voltage dividing circuit 60, the overall gain of the tuningamplifier section may be set to 1.

Illustrated in FIG. 18 is a circuit schematic of the tuning amplifiersection with the voltage dividing circuit interposed between thesubsequent stage phase shifting circuit and the output terminal 92eliminated. The tuning amplifier section 2A in FIG. 18 is equal to thetuning amplifier section 2 in FIG. 2 with the dividing ratio of thevoltage dividing circuit 60 set to 1. In other words, the two dividingresistors in the voltage dividing circuit 60 in FIG. 2 are replaced by asingle resistor 78 in FIG. 18.

The tuning amplifier section 2A as constructed above excludes thevoltage dividing circuit 60 as shown in FIG. 2 and the gain of each ofthe phase shifting circuits 10C, 30C is set to greater than 1 in orderto compensate for the loss in the open loop including the phase shiftingcircuits 10C, 30C.

Note that, in the tuning amplifier sections 2, 2A as shown in FIGS. 2and 18, the voltage dividing circuit comprising the resistors 21,23 or41,43 is connected to set the gain of each of the phase shiftingcircuits 10C, 30C greater than 1, thereby compensating for loss in theopen loop gain. However, only one of the two phase shifting circuits10C, 30C is set to have a gain greater than 1 while the other gain setto 1. In order to set the gain of the phase shifting circuit 10C, thevoltage dividing circuit comprising the resistors 21, 23 is removed andthe output from the operational amplifier 12 is directly fed back by wayof the resistor 20. Similarly, the gain of the phase shifting circuit30C can be set to 1 by removing the voltage dividing circuit comprisingthe resistors 41, 43 and directly feeding back the output from theoperational amplifier 32.

Loss of the open loop gain of the feedback loop including the phaseshifting circuits 10C, 30C and the feedback resistor 70 is caused by theinput impedance of the front stage phase shifting circuit 10C. In orderto reduce the loss due to the input impedance, a follower circuit usinga transistor may be interposed at the preceding stage of the front stagephase shifting circuit 10C so that the feedback signal is applied to thefront stage phase shifting circuit 10C by way of the follower circuit.

However, it is to be noted that a certain gain loss is caused by thefollower circuit even if it may avoid the loss of the open loop gain. Inorder to compensate for the loss by follower circuit, it is necessary tomake either one of the phase shifting circuits 10C, 30C has more than 1gain similar to the above mentioned embodiment.

Now, illustrated in FIG. 19 is a circuit schematic of a tuning amplifiersection 2B having an additional source follower circuit.

The source follower circuit 50 interposed at the input side of the frontstage phase shifting circuit 10C includes an FET (field effecttransistor) 52 having the drain connected to a positive power supplyVdd, and the source returned to a negative power supply Vss by way of asource resistor 54. The source follower circuit is constituted by theFET 52 and the resistor 54 and the output from the source followercircuit is fed to the front stage phase shifting circuit 10C. It is tobe note that the source follower circuit may be replaced by an emitterfollower circuit. (Second Embodiment of the Tuning Amplifier Section)

Now, illustrated in FIG. 20 is a circuit schematic of an alternativeembodiment of the tuning amplifier section. The tuning amplifier section2C as shown in FIG. 20 comprises two phase shifting circuits 110C, 130Cto provide a total of 360° phase shift of an input AC signal at apredetermined frequency and an adding circuit to add with apredetermined ratio the input signal applied to an input terminal 90 towhich an input resistor 74 is connected and a signal (feedback signal)to be fed back from the output of the subsequent stage phase shiftingcircuit 130C by way of a feedback resistor 70. (Note that the resistanceof the input resistor 74 is n times of that of the feedback resistor70.)

In the tuning amplifier sections 2, 2A, 2B as shown in FIG. 2, etc., theresistances of the resistors 18, 20 in the front stage phase shiftingcircuit 10C are set equal to each other, thereby maintaining the outputamplitude unchanged when the frequency of the input AC signal varies.Also, the voltage dividing circuit comprising the resistors 21, 23connected to the output of the phase shifting circuit 10C sets the gaingreater than 1. On the contrary, the front stage phase shifting circuit110C included in the tuning amplifier section 2C in FIG. 20 does notemploy the voltage dividing circuit comprising the resistors 21, 23 andthe gain of the phase shifting circuit 110C is set greater than 1 bychoosing the resistance of the resistor 20' larger than that of theresistor 18'.

The same is true about the subsequent stage phase shifting circuit 130Cand the gain is set greater than 1 by choosing the resistance of theresistor 40' larger than that of the resistor 38'.

By setting the gain of the two phase shifting circuits 110C, 130C inFIG. 20 greater than 1, loss of the open loop gain of the feedback loopin the tuning amplifier section 2C can be compensated, therebyperforming the same tuning operation as the tuning amplifier sections 2and the like as shown in FIG. 2 and the like.

In case of setting the gain of each phase shifting circuit greater than1, the gain tends to vary depending on the input signal frequency.Taking the front stage phase shifting circuit 110C as an example, thephase shifting circuit 110C acts as a voltage follower with a unity (1)gain in low input signal frequencies. In high frequencies, however, thephase shifting circuit 110C acts as an inverter amplifier with the gainof -m (m represents the resistance ratio between the resistors 20' and18'), the gain of the phase shifting circuit 110C and thus the outputsignal amplitude tend to vary depending on the input signal frequency.

Such amplitude variation may be suppressed by connecting a resistor 22to the inverting input terminal of the operational amplifier 12 byequalizing the gains in low and high input signal frequencies.Similarly, in the phase shifting circuit 130C, a resistor 42 having apredetermined resistance is connected to the inverting input terminal ofthe operational amplifier 32, thereby suppressing the output signalamplitude variation.

Then, proper setting of the resistance of the resistor 22 (or resistor42) will be studied. Illustrated in FIG. 21 is a generalized circuitschematic of the above mentioned phase shifting circuits 110C, 130C. TheCR circuit included in each phase shifting circuit is represented byelements having impedances z1 and z2. As shown in FIG. 21, theresistance of the input resistor of the operational amplifier isrepresented by r, the resistance of the feedback resistor mr, theresistance of the resistor (22 or 42) connected to the inverting inputterminal of the operational amplifier R, and the potential on theinverting input terminal of the operational amplifier V.

Then, the following relationship holds true between the input voltage Eiand the potential V:

    r(Ia+Ib)+V=Ei                                              (8)

Also, the potential V can be represented as follows by using variesconstants shown in FIG. 21:

    V=Ib R                                                     (9)

    V=Eo+mr·Ia                                        (10)

    V={z2/(z1+z2)}Ei=kEi                                       (11)

In the expression (11), the dividing ratio of the two elements havingimpedances z1 and z2 is represented by k.

Ia and Ib are calculated from the above expressions (10) and (9) andsubstituted in the expression (8) and then the result in the expression(11) to eliminate V. Then,

    Ea=(Rk+Rmk+mrk-Rm)Ei/R                                     (12)

Incidentally, condition when the phase shifting circuit as shown in FIG.21 operates as an inverter amplifier is that the impedance z2 is equalto 0 Ω and k=0. Then, the expression (12) can be:

    Eo=-mEi                                                    (13)

Condition when the phase shifting circuit in FIG. 21 operates as afollower circuit is that the impedance z1 is equal to 0 Ω and k=1. Then,the expression (12) can be:

    Eo=(R+mr)Ei/R                                              (14)

If there is no gain changes when the phase shifting circuit 110C or 130Coperates as an inverting amplifier and a follower circuit, the absolutevalues of Eo given by the expressions (13) and (14) are equal to eachother, thereby establishing the following expression (15):

    m=(R+mr)/R                                                 (15)

    R=mr/(m-1)                                                 (16)

As a result, setting the resistance R of the resistor 22 in the phaseshifting circuit 110C or the resistance R of the resistor 42 in thephase shifting circuit 130C in accordance with the expression (16) helpsto suppress the gain changes as the frequency is varied from lowfrequency to high frequency.

Although the tuning amplifier section 2C as shown in FIG. 20 isconfigured each of the phase shifting circuits 110C, 130C to include aCR circuit, it is possible to configure the tuning amplifier sectionusing phase shifting circuits each including an LR circuit comprising aresistor and an inductor replacing the CR circuit.

Now, illustrated in FIG. 22 is a circuit schematic of a phase shiftingcircuit including such LR circuit, which can be replaced for the frontstage phase shifting circuit 110C in the tuning amplifier section 2C asshown in FIG. 20. The phase shifting circuit 110L as shown in FIG. 22 isequal to the front stage phase shifting circuit 110C in FIG. 20 with theCR circuit of the capacitor 14 and the variable resistor 16 replaced bythe LR circuit of a variable resistor 16 and an inductor 17.

The transfer function of the above phase shifting circuit 110L is givenby K2 in the expression (4) if the time constant T₁ of the LR circuitcomprising the inductor 17 and the variable resistor 16 is equal to L/R(i.e., T₁ =L/R) with L and R representing the inductance of the inductor17 and the resistance of the variable resistor 16. Consequently, thephase shift is equal to φ 1 in the expression (1) if represented by thetime constant T₁.

Also, illustrated in FIG. 23 is a circuit schematic of an alternativephase shifting circuit including an LR circuit, which can be replacedfor the subsequent stage phase shifting circuit 130C of the tuningamplifier section 2C as shown in FIG. 20. The phase shifting circuit130L in FIG. 23 is equal to the subsequent stage phase shifting circuit130C in FIG. 20 with the CR circuit comprising the variable resistor 36and the capacitor 34 replaced by the LR circuit comprising the inductor37 and the variable resistor 36.

The transfer function of the above mentioned phase shifting circuit 130Lcan be the same as K3 given by the above expression (5) if the timeconstant T₂ of the LR circuit comprising the variable resistor 36 andthe inductor 37 is equal to L/R (i.e., T₂ =L/R where L and R are theinductance of the inductor 37 and the resistance of the variableresistor 36, respectively). As a result, the phase shift is the same asφ 2 given by the above expression (2) using the above time constant T₂.

As apparent from the above, the phase shifting circuits 110L and 130L inFIGS. 22 and 23 are equivalent to the phase shifting circuits 110C and130C in FIG. 20, thereby enabling to replace the front stage phaseshifting circuit 110L in FIG. 22 and the subsequent stage phase shiftingcircuit 130L in FIG. 23 for the front stage phase shifting circuit 110Cand the subsequent stage phase shifting circuit 130C in the tuningamplifier section 2C as shown in FIG. 20. If the two phase shiftingcircuits 110C and 130C are replaced by the phase shifting circuits 110Land 130L, it is easy to form the entire tuning amplifier section as anintegrated circuit and to obtain higher tuning frequency.

On the other hand, if either one of the two phase shifting circuits110C, 130C is replaced by the phase shifting circuit 110L or 130L,temperature drift of the tuning frequency may be suppressed.

Incidentally, amplitude fluctuation of the tuning amplifier section 2Cas shown in FIG. 20 due to adjustment of the tuning frequency isminimized by connecting resistors 22 or 42 to the two phase shiftingcircuits 110C, 130C in the tuning amplifier section 2C shown in FIG. 20.However, in a case of narrow frequency variation, there is littleamplitude fluctuation, thereby enabling to constitute the tuningamplifier section by eliminating the aforementioned resistors 22, 42.Alternatively, either one of the two resistors 22, 42 may be eliminatedfrom the tuning amplifier section.

Illustrated in FIG. 24 is a circuit schematic of another embodiment ofthe tuning amplifier section. In this embodiment, the phase shiftingcircuits are configured by eliminating the resistors 22, 42 included inthe phase shifting circuits 110C, 130C in the tuning amplifier section2C as shown in FIG. 20.

It is to be noted that the present invention is not limited only to theabove mentioned embodiments and that various modifications can be madewithout departing from the scope of the present invention.

For example, the variable resistors 16, 36 included in the tuningamplifier sections constituting the above tuning circuits may bereplaced by channel resistances of junction type or MOS type FETs forconvenience of integrating on a semiconductor substrate. In such case,resistance between the source and drain electrodes of such FET can becontrolled by varying the gate voltage.

Also, the variable resistors 16, 36 may be configured using a parallelconnection of a p-channel and n-channel FETs. A variable resistorcomprising a combination of such FETs helps to improve linearity of theFETs, thereby providing a tuning output with minimum distortion.

Although variable resistors are included in the two phase shiftingcircuits of the aforementioned various tuning amplifier sections, avariable resistor may be included in either one of the phase shiftingcircuits to control the tuning frequency. The use of a variable resistorin each of the two phase shifting circuits is advantageous to provide awider variable range of the tuning frequency. In case of including avariable resistor in only one phase shifting circuit, it is advantageousto easily control the tuning frequency.

It is also possible to form the variable resistor by using a PIN diodethrough which a variable current is made to flow, thereby controllingthe resistance between both ends of the PIN diode.

Also, in the phase shifting circuit having a CR circuit, the timeconstant of such CR circuit may be varied by controlling the capacitanceof the capacitor instead of controlling the resistance of the resistor,thereby varying the phase shift of the phase shifting circuit or thetuning frequency of the tuning amplifier section.

More in detail, the capacitor (for example the capacitor 14 in FIG. 3)constituting the CR circuit is replaced by a variable capacitance diodeand a DC blocking capacitor. Application of a variable reverse biasvoltage to the variable capacitance diode varies the capacitance betweenthe anode and the cathode. If a CR circuit is formed with a seriesconnection of such variable capacitance diode and a resistor, the timeconstant of the CR circuit can be varied depending on the reverse biasvoltage applied to the diode, thereby shifting the phase of the phaseshifting circuit. Also, the variable capacitance diode may be replacedby an FET whose gate capacitance varies in certain range depending onthe control voltage to the gate.

Similarly, in a phase shifting circuit having an LR circuit, the timeconstant of the LR circuit may be controlled by varying the inductanceof a variable inductor instead of varying the resistance of a variableresistor, thereby shifting the phase of the phase shifting circuit orvarying the tuning frequency of each tuning amplifier section.

Illustrated in FIG. 25 is a simplified planar configuration of avariable inductor formed on a semiconductor substrate.

The variable inductor 17a shown in FIG. 25 comprises a spiral shapedinductor conductor 312 formed on a semiconductor substrate 310, acontrol conductor 314 formed about the inductor conductor 312 and aninsulating magnetic member 318 covering the inductor conductor 312 andthe control conductor 314.

The above mentioned control conductor 314 is designed to be connected toa variable voltage source 316 at both ends of the control conductor 314.By controlling the DC bias voltage of the variable voltage source 316, avariable bias current flows through the control conductor 314.

The semiconductor substrate 310 may be made from, for example, n-typesilicon substrate (n-Si substrate) or any other semiconductor material(for example, amorphous material such as germanium, amorphous silicon,etc.). The inductor conductor 312 may be made from a thin film ofaluminum, gold, etc. or polysilicon or other semiconductor material inspiral form. Note that formed on the semiconductor substrate 310 arevariable inductor 17a and other components of the tuning amplifiersection as shown in FIG. 2, etc.

Illustrated in FIG. 26 is a more detailed view of the inductor conductor312 and the control inductor 314 constituting the variable inductor 17aas shown in FIG. 25.

As apparent from FIG. 26, the inductor conductor 312 is in a spiral formof a desired number of turns (for example 4 turns) inside the controlconductor 314 and has a pair of terminal electrodes 322, 324 at bothends. Similarly, the control conductor 314 outside of the inductorconductor 312 is in a spiral form of a desired number of turns (forexample 2 turns) and has a pair of terminal electrodes 326, 328 at bothends.

Now, illustrated in FIG. 27 is a magnified cross section view of theinsulative magnetic member 318 including the inductor conductor 312 andthe control conductor 314 along the line A--A in FIG. 26.

As best shown in FIG. 27, the inductor conductor 312 and the controlconductor 314 are formed on the surface of the semiconductor substrate310 by way of an insulative magnetic layer 318a. Also, anotherinsulative magnetic layer 318b is coated over the conductors 312 and314. The insulative magnetic member 318 as shown in FIG. 25 is definedby the two magnetic layers 318a and 318b.

The magnetic layers 318a and 318b may be made from, for example, gammaferrite, barium ferrite, or other magnetic materials. Various materialsand methods of making the magnetic member are available. For example,the magnetic layer may be made by vacuum deposition, molecule beamepitaxy (MBE method), chemical vapor deposition (CVD method), orsputtering method of, for example, FeO or other materials.

It is to be noted that an insulation layer 330 of non-magnetic materialis disposed to cover the inductor conductor 312 and the controlconductor 314. Displacing the magnetic layer 318a and 318b from theperiphery of the conductors 312, 314 helps to minimize leakage magneticflux in this area, thereby providing a variable inductor 17a having alarge inductance by effective use of the magnetic flux generated by theinductor conductor 312.

Such variable inductor 17a as shown in FIG. 25, etc. comprises theinsulative magnetic member 318 (magnetic layers 318a and 318b) coveringthe inductor conductor 312 and the control conductor 314. A variable DCbias current is made to flow through the control conductor 314, therebyvarying the saturated magnetization characteristic of the inductorconductor 312 having the insulative magnetic member 318 as its magneticpath. As a result, the inductance of the inductor conductor 312 iscontrolled.

The inductance of the inductor conductor 312 can be directly controlledand can be fabricated easily on the semiconductor substrate 310 usingconventional thin film forming and semiconductor fabrication processes.Additionally, other circuit components and devices of the tuningamplifier section 2 may be formed on the semiconductor substrate 310,thereby enabling to form the entire tuning circuit 1 as an integratedcircuit.

It is to be understood that the inductor conductor 312 and the controlconductor 314 may be formed in a spiral manner alternately orsuperimposed to obtain the variable inductor 17a in FIG. 25. In anyexample, the DC bias current through the control conductor 314 iscontrolled to alter the saturation magnetization characteristic of theinsulative magnetic member 318, thereby varying the inductance of theinductor conductor 312 over a certain range.

Although the variable inductor 17a in FIG. 25 is described to form theinductor conductor 312 on the semiconductor substrate 310, the inductorconductor 312 may be formed on any insulative or conductive substrateincluding ceramic, etc.

Also, an insulative material is used as the magnetic layers 318a, 318bin the above example, metal powder (MP) or other conductive material maybe used so long as each inductor conductor is electrically insulatedfrom such conductive magnetic layers to avoid shunting of the inductorconductor. Such insulation may be realized by forming an oxide film onthe inductor conductor 312 or by forming a silicon oxide or nitride filmby chemical vapor deposition or other technique.

In particular, electrically conductive magnetic materials such as metalpowder tend to have higher magnetic permeability as compared withinsulative magnetic materials such as gamma ferrite, thereby making themeffective to increase the inductance.

In the variable inductor 17a in FIG. 25, both inductor conductor 312 andthe control inductor 314 are entirely covered with the insulativemagnetic member 318. However, a part of the conductors 312, 314 may becovered to form the magnetic path. In case of partly forming themagnetic path by the insulative (or conductive) magnetic member, themagnetic flux generated by the inductor conductor 312 and the controlconductor 314 tends to saturate easily due to reduced magnetic path.This means that a small bias current in the control conductor 314 maysaturate the flux, thereby enabling to control the inductance of theinductor conductor 312 using a small bias current. This helps tosimplify the control circuit.

Although the inductor conductor 312 and the control conductor 314 in thevariable inductor 17a in FIG. 25 are formed in a concentric spiralmanner, these conductors 312, 314 may be formed at adjacent locations onthe semiconductor substrate 310 with insulative or conductive magneticmember therebetween for forming a magnetic path for magnetic couplingbetween the both conductors.

Illustrated in FIG. 28 is a plan view of a variable inductor 17bincluding side-by-side inductor and control conductors.

The variable inductor 17b as shown in FIG. 28 comprises a spiral forminductor conductor 312a formed on a semiconductor substrate 310, aspiral form control conductor 314a formed at an adjacent location to theinductor conductor 312a, and an insulative (or conductive) magneticmember 319 covering center portions of the both spiral conductors 312a,314a.

Similar to the variable inductor 17a in FIG. 25, connected to thecontrol conductor 314a at both ends thereof is a variable voltage source316 to apply a variable bias voltage. Controlling the bias voltage bythe variable voltage source 316 varies the bias current through thecontrol conductor 314a.

The above mentioned variable inductor 17b has an annular insulativemagnetic member 319 (magnetic layers 319a, 319b) passing through thecenters of the spiral inductor conductor 312a and the control conductor314a. Controlling the DC bias current to flow through the controlconductor 314a varies the saturation magnetization characteristic of themagnetic member 319 to define the magnetic path to the inductorconductor 312a, thereby varying the inductance of the inductor conductor312a.

In a case where various tuning amplifier sections mentioned above areformed on a semiconductor substrate, it is difficult to form a capacitor14 and the like having a large capacitance. It is therefore convenientto increase the apparent capacitance of such capacitor formed on asemiconductor substrate by using a circuit, thereby increasing the timeconstant T and thus decreasing the tuning frequency.

Illustrated in FIG. 29 is an alternative example of a capacitor 14 andthe like integrated with a circuit for use with the phase shiftingcircuit 10C in FIG. 3 and the like. This is a capacitance convertercircuit to increase the apparent capacitance of the actual capacitorformed on a semiconductor substrate. The entire circuit of thecapacitance converter circuit as shown in FIG. 29 is used as thecapacitor 14 in the phase shifting circuit 10C.

The capacitance converter circuit 14a in FIG. 29 comprises a capacitor210 having a capacitor C0, a pair of operational amplifiers 212, 214 andfour resistors 216, 218, 220, and 222.

The first stage operational amplifier 212 includes the resistor 218(having resistance R18) connected between the output terminal and theinverting input terminal and the resistor 216 (having resistance R16)connected between the inverting input terminal and ground.

Now, there is a relationship given by the following expression (17)between the voltage E1 applied to the non-inverting input terminal andthe voltage E2 appearing on the output terminal of the first stageoperational amplifier 212:

    E2=(1+R18/R16)E1                                           (17)

The primary function of the first stage operational amplifier 212 is abuffer for impedance conversion and the gain of the first stageoperational amplifier 212 may be 1. The unity gain is achieved whenR18/R16=0, i.e., when R16 is ∞ (removing the resistor 216) or when R18is 0 (directly connecting).

On the other hand, the second stage operational amplifier 214 includesthe resistor 222 (having resistance R22) connected between the outputterminal and the inverting input terminal and the resistor 220 (havingresistor R20) connected between the inverting input terminal and theoutput terminal of the above operational amplifier 212. Also, thenon-inverting input terminal is returned to ground.

Let the voltage appearing on the output terminal of the second stageoperational amplifier 214 be E3, there is the following relationshipbetween the voltage E3 and the output voltage E2 from the first stageoperational amplifier 212:

    E3=-(R22/R20)E2                                            (18)

As understood from the above expression (18), the second stageoperational amplifier 214 acts as an inverting amplifier and the firststage operational amplifier 212 is used to establish a high inputimpedance of the second stage operational amplifier 214.

Now, connected between the non-inverting input terminal of the firststage operational amplifier 212 and the output terminal of the secondstage operational amplifier 214 is the capacitor 210 having the abovecapacitance C0.

If the transfer function of the entire circuit of the capacitanceconverter circuit 14a in FIG. 29, excluding the capacitor 210 is K4, thecapacitance converter circuit 14a can be represented by the systemdiagram in FIG. 30. Illustrated in FIG. 31 is a system diagram of thecircuit in FIG. 30 further converted by using the Miller's principle.

The impedance Z1 in FIG. 31 can be represented by the followingexpression (19) by using the impedance Z0 in FIG. 30:

    Z1=Z0/(1-K4)                                               (19)

In the capacitance converter circuit 14a in FIG. 29, the impedanceZ0=1/(jwC0). This is incorporated in the expression (19) to obtain thefollowing expressions (20), (21): ##EQU2## The above expression (21)suggests that the apparent capacitance of the capacitor 210 having thecapacitance C0 in the capacitance converter circuit 14a is increased to(1-K4) times of C0. As a result, if the gain K4 of the amplifier isnegative, (1-K4) is always greater than 1, thereby increasing thecapacitance C0.

Incidentally, the gain of the amplifier in the capacitance convertercircuit 14a in FIG. 29, i.e., the gain K4 of the amplifier comprisingthe entire operational amplifiers 212, 214 can be determined from theabove expressions (17) and (18) as follows:

    K4=-(1+R18/R16)R22/R20                                     (22)

Now, incorporating the above expression (22) with the expression (21),

    C={1+(1+R18/R16)R22/R20}C0                                 (23)

By proper setting of the resistances of the four resistors 216, 218, 220and 222, the apparent capacitance C between the two terminals 224, 226can be increased.

In case of the gain of the first stage operational amplifier 212 is 1,i.e., when R16 is set ∞ (by removing the resistor 216) or R18 is 0 Ω sothat R18/R16=0, the above expression (23) can be simplified as follows:

    C=(1+R22/R20)C0                                            (24)

As apparent from the above expression (24), the above capacitanceconverter circuit 14a acts to increase the apparent capacitance of thecapacitor 210 formed on the semiconductor substrate larger than theactual capacitance C0 by varying the resistance ratio R18/R16 of theresistors 216, 218 or R22/R20 of the resistors 220, 222. In case offorming the entire tuning amplifier section in FIG. 2 on a semiconductorsubstrate, the capacitor 210 having a small capacitance C0 on asemiconductor substrate and the apparent capacitance C can be increasedby the circuit as shown in FIG. 29, thereby making it particularlysuitable for integrated circuit. Especially, if it is possible toestablish a larger capacitance, the area for forming the tuningamplifier section can be reduced, thereby reducing the material cost.

Also, at least one of the resistors 216, 218, 220, 222 is made as avariable resistor, more particularly by a junction type or MOS type FETor parallel connection of a p-channel FET and an n-channel FET, therebyeasily forming a variable capacitance capacitor. The use of suchcapacitor replacing the variable capacitance diode helps to control thephase shift over a certain range. This enables to control the frequencyat which the phase shift of the tuning amplifier section is 0° in aloop.

Since the first stage operational amplifier 212 is used as a buffer toincrease the input impedance as described above, the operationalamplifier 212 may be replaced by an emitter follower circuit or a sourcefollower circuit.

Although in FIG. 29 an amplifier having a predetermined gain and acapacitor are combined to increase the apparent capacitance higher thanthe capacitance of the actual capacitance element, an inductor may beused instead of the capacitor and the apparent inductance of suchinductor will be increased.

The impedance Z1 as shown in FIG. 31 is given by the expression (19) byusing the impedance Z0 as shown in FIG. 30. In case of an inductorhaving the inductance L0, the impedance Z0=j ω L0. This is incorporatedwith the expression (19), then

    Z1=j ω L0/(1-K4)=j ω L{L 0/(1-K4)}             (25)

    L=L0/(1-K4)                                                (26)

This expression (26) shows that the actual inductor element is increasedin apparent by 1/(1-K4) times. If the gain K4 is set to any valuebetween 0 to 1, the apparent capacitance is increased.

Now, illustrated in FIG. 32 is an alternative circuit to replace theinductor 17 within the phase shifting circuit 10L as shown in FIG. 14.The circuit in FIG. 32 is an inductance converter circuit to increasethe apparent inductance of the inductor element (inductor conductor)formed on a semiconductor substrate.

The inductance converter circuit 17c in FIG. 32 comprises an inductor260 having a given inductance L0, a pair of operational amplifiers 262,264 and a pair of resistors 266, 268.

The first stage operational amplifier 262 is a unity gain non-invertingamplifier having its output terminal coupled to its inverting inputterminal, thereby acting as a buffer primarily for impedance converter.Similarly, the second stage operational amplifier 264 has its outputterminal coupled to its inverting input terminal to act as a unity gainnon-inverting amplifier. Also included between the two non-invertingamplifiers is a voltage dividing circuit comprising resistors 266, 268.

By inserting the voltage dividing circuit, the overall gain of theamplifier including the two operational amplifiers can be set to anyvalue between 0 to 1.

In the inductance converter circuit 17c in FIG. 32, let the transferfunction of the entire circuit (amplifier) excluding the inductor 260 beK4, the gain K4 is determined by the dividing ratio of the voltagedividing circuit comprising the resistors 266, 268. If the resistancesof the resistors 266 and 268 are R66 and R68, K4 is given by thefollowing expression (27):

    K4=R68/(R66+R68)                                           (27)

The gain K4 is incorporated with the above expression (26) to calculatedthe apparent inductance, ##EQU3## As a result, by increasing theresistance ratio R68/R66 of the resistors 266 and 268, the apparentinductance L between two terminals 254 and 256 can be increased. Forexample, in case of R68=R66, it is understood from the above expression(28) that the apparent inductance L is twice as large as L0.

As a result, the above mentioned inductance converter circuit 17c isuseful for increasing the apparent inductance by controlling thedividing ratio of the voltage dividing circuit interposed between thetwo non-inverting amplifiers as composed with the actual inductance L0of the inductor 260. This is particularly advantageous in case offorming the tuning amplifier section on a semiconductor substratebecause the inductor 260 having a small inductance L0 may be formed on asemiconductor substrate by a spiral conductor and converting it into alarger inductance L by the inductance converter circuit as shown in FIG.32. Especially, if the inductance can be increased to a certain largevalue, the tuning frequency of the tuning amplifier section can beextended to a lower frequency range. Additionally, forming the entirecircuit as an integrated circuit, the tuning amplifier section requiresa small area, thereby reducing the material cost.

Other than fixing the dividing ratio of the voltage dividing circuitcomprising the resistors 266, 268, at least one of the two resistors266, 268 may be made by a variable resistor, for example, by a parallelconnection of p-channel and n-channel FETs, a junction type FET or a MOStype FET so that the dividing ratio may be continuously variable. Insuch case, the gain of the entire amplifier including the twooperational amplifiers 262, 264 in FIG. 32 varies, thereby providing acontinuously variable inductance L between the two terminals 254, 256.The use of such inductance converter circuit 17c instead of a variableinductor helps to provide a variable phase shift of the phase shiftingcircuit in a certain range. As a result, the frequency to provide 360°phase shift in the loop of the tuning amplifier section can be altered,thereby controlling the tuning frequency to a desired value.

Since the gain of the entire amplifier including the two operationalamplifiers 262, 264 constituting the inductance converter circuit 17c inFIG. 32 is set less than 1, the entire circuit may be replaced by anemitter follower circuit or a source follower circuit.

Although a highly stable circuit is realized in the above mentionedtuning amplifier sections by using the phase shifting circuit 10Cincluding operational amplifiers, such operational amplifiers in eachphase shifting circuit may be replaced by differential input amplifiershaving a given amplification factor because offset voltages and voltagegains are not critical in the particular applications such as in thephase shifting circuits 10C, 30C, etc.

Now, illustrated in FIG. 33 is a detailed circuit schematic of a circuitportion for phase shift operation in the operational amplifier. This isa differential input amplifier having a predetermined gain. Thedifferential input amplifier in FIG. 33 comprises a differential inputstage 100 including FETs, a constant current circuit 102 to provide aconstant current to the differential input stage 100, a bias circuit 104to provide a given bias voltage to the constant current circuit 102, andan output amplifier 106 coupled to the differential input stage 100. Asshown in FIG. 33, multi-stage amplifier circuits to acquire a voltagegain in an actual operational amplifier are eliminated to simplify thedifferential input amplifier, thereby achieving a wide band operation.Such simple circuit helps to increase the upper operation frequencylimit and thus increasing the upper limit of the tuning frequency of thetuning amplifier section by using such differential input amplifier.

Although the above mentioned tuning circuit is described to have a pairof identical tuning amplifier sections 2 and 3, it is possible tocascade connect two different types of tuning amplifier sections. Forexample, the tuning amplifier section 2 in FIG. 2 may be combined withthe tuning amplifier section 2C in FIG. 20. Also, needless to say thattwo or more tuning amplifier sections may be connected in any desiredorder.

The phase shifting circuit 10C included in the tuning amplifier section2 in FIG. 2 and the phase shifting circuit 110C included in the tuningamplifier section 2C in FIG. 20 operate as full band pass circuits. Itis, therefore, possible to configure the tuning amplifier section byinterchanging the phase shifting circuits having the same phase shiftdirection (for example the phase shifting circuits 10C and 110C or thephase shifting circuits 30L and 130L).

INDUSTRIAL APPLICABILITY

As understood from the above descriptions by reference to preferredembodiments of the present invention, a wider tuning frequency bandwidththan the case of using a single tuning amplifier section can be achievedby the cascade connection of a plurality of tuning amplifier sectionswith identical or mutually shifted tuning frequency or frequencies eachincluding a pair of full band pass type phase shifting circuits and anadding circuit to add both input and feedback signals, thereby assuringa maximum attenuation.

Additionally, the entire tuning circuit can be easily configured as anintegrated circuit especially when the pair of phase shifting circuitsin each tuning amplifier section include CR circuits. Similarly, if thepair of phase shifting circuits include LR circuits, small inductors maybe formed by an integrated circuit technology, thereby providing highertuning frequencies without any difficulty. In a case of using a CRcircuit in one phase shifting circuit while an LR circuit in the otherphase shifting circuit, operational performances can be stabilizedregardless of temperature and other factors.

We claim:
 1. A tuning circuit including a plurality of cascade connectedtuning amplifier sections each having substantially equal tuningfrequency, each of said tuning amplifier sections comprising:an addingcircuit for adding an input signal applied to one end of an inpoutimpedance element and a feedback signal applied to one end of a feedbackimpedance; a pair of phase shifting circuits of mutually opposite phaseshift directions including a series circuit of a first resistor and acapacitor or an inductor and a differential input amplifier; and a firstvoltage dividing circuit for dividing an input AC signal thereto by adesired dividing ratio; wherein said pair of phase shifting circuits andsaid first voltage dividing circuit are connected in a cascade manner,the added signal from said adding circuit is applied to the input stageof said plurality of cascade connected circuits, the output from thefinal stage circuit is applied through said voltage dividing circuit tothe one end of said feedback impedance element, and the input to saidvoltage dividing circuit is derived as the output signal and wherein allconstituent components are integrally formed on a semiconductorsubstrate.
 2. A tuning ciruit including a plurality of cascade connectedtuning amplifier sections having their tuning frequencies shifted by agiven frequency, each of said tuning amplifier sections comprising:anadding circuit for adding an input signal applied to one end of an inputimpedance element and a feedback signal applied to one end of a feedbackimpedance element; a pair of phase shifting circuits of opposite phaseshift directions to each other and including a series circuit of a firstresistor and capacitor or an inductor, and a differential inputamplifier; and a first voltage dividing circuit for dividing an input ACsignal by a predetermined dividing ratio; wherein said pair of phaseshifting circuits and said first voltage dividing circuits are connectedin a cascade manner, the added signal from said adding circuit isapplied to the first stage circuit of said plurality of cascadeconnected circuits, an output signal from the final stage ciruit isapplied through said voltage dividing circuit to the one end of saidfeedback impedance element as the feedback signal, and the signal to beapplied to said voltage dividing circuit is derived as the output signaland wherein all constituent components are integrally formed on asemiconductor substrate.
 3. A tuning circuit including a plurality ofcascade connected tuning amplifier sections each having substantiallyequal tuning frequency, each of said tuning amplifier sectionscomprising:an adding circuit for adding an input signal applied to oneend of an input impedance element and a feedback signal applied to oneend of a feedback impedance; a pair of phase shifting circuits ofmutually opposite phase shift directions including a series circuit of afirst resistor and a capacitor or an inductor and a differential inputamplifier; and a first voltage dividing circuit for dividing an input ACsignal thereto by a desired dividing ratio; wherein said pair of phaseshifting circuits and said first voltage dividing circuit are connectedin a cascade manner, the added signal from said adding circuit isapplied to the input stage of said plurality of cascade connectedcircuits, the output from the final stage circuit is applied to the oneend of said feedback impedance element, and the input to said voltagedividing circuit is derived as the output signal, wherein at least oneof said pair of phase shifting circuits includes a second resistorconnected to the inverting input terminal of said differential inputamplifier through which an AC signal is applied, a second voltagedividing circuit connected to the output terminal of said differentialamplifier, a third resistor interposed between the output of said secondvoltage dividing circuit and the inverting input terminal of saiddifferential input amplifier, and said series circuit, and wherein thejunction point of said first resistor and said capacitor or inductorconstituting said series circuit is connected to the non-inverting inputterminal of said differential input amplifier.
 4. The tuning circuit ofclaim 3, wherein said differential input amplifier comprises anoperational amplifier.
 5. The tuning circuit of claim 3, wherein saidsecond and third resistors are set to have an equal resistance to eachother.
 6. The tuning circuit of claim 3, wherein said input and feedbackimpedance elements are resistors of a variable resistance ratio forcontrolling the tuning frequency bandwidth of said tuning amplifiersection.
 7. The tuning circuit of claim 3, wherein the time constant ofsaid series circuit is varied to obtain a variable tuningcharacteristic.
 8. The tuning circuit of claim 7, wherein said firstresistor included in said series circuit is variable to provide avariable resistance for controlling the tuning characteristic.
 9. Thetuning circuit of claim 8, wherein said variable resistor is formed by aparallel connection of p-channel and n-channel FETs to vary the channelresistances depending on the gate voltage.
 10. The tuning circuit ofclaim 3, wherein a transistor follower circuit is interposed betweensaid pair of phase shifting circuits and said adding circuit.
 11. Thetuning circuit of claim 3, wherein the dividing ratio of said secondvoltage dividing circuit is set to
 1. 12. The tuning circuit of claim 3,wherein said inductor included in said series circuit is formed on asemiconductor substrate and comprises two spiral electrodes magneticallycoupled together by way of a magnetic member to provide a variable DCbias current to one of said electrodes, thereby controlling theinductance of the other electrode.
 13. The tuning circuit of claim 3,wherein said capacitor included in said series circuit comprises anamplifier having a negative gain and a capacitor element connectedbetween the input and output of said amplifier to constitute acapacitance converter circuit.
 14. The tuning circuit of claim 3,wherein said inductor included in said series circuit comprises onamplifier having the gain between 0 to 1 and an inductor elementconnected between the input and output of said amplifier to constitutean inductance converter circuit.
 15. A tuning circuit including aplurality of cascade connected tuning amplifier sections each havingsubstantially equal tuning frequency, each of said tuning amplifiersections comprising:an adding circuit for adding an input signal appliedto one end of an input impedance element and a feedback signal appliedto one end of a feedback impedance; a pair of phase shifting circuits ofmutually opposite phase shift directions including a series circuit of afirst resistor and a capacitor or an inductor and a differential inputamplifier; and a first voltage dividing circuit for dividing an input ACsignal thereto by a desired dividing ratio; wherein said pair of phaseshifting circuits and said first voltage dividing circuit are connectedin a cascade manner, the added signal from said adding circuit isapplied to the input stage of said plurality of cascade connectedcircuits, the output from the final stage circuit is applied to the oneend of said feedback impedance element, and the input to said voltagedividing circuit is derived as the output signal, wherein at least oneof said pair of phase shifting circuits includes a second resistorconnected to the inverting input of said differential input amplifierthrough which an AC signal is applied, a third resistor interposedbetween the inverting input and output terminals of said differentialinput amplifier, a fourth resistor connected between the inverting inputterminal of said differential input amplifier and ground, and saidseries circuit, and wherein the junction point of said first resistorand said capacitor or inductor constituting said series circuit isconnected to the non-inverting input terminal of said differential inputamplifier.
 16. The tuning circuit of claim 15, wherein the saiddifferential input amplifier comprises an operational amplifier.
 17. Thetuning circuit of claim 15, wherein the resistance of said thirdresistor is set higher than that of said second resistor.
 18. The tuningcircuit of claim 15, wherein said input and feedback impedance elementsare resistors having a variable resistance ratio to control the tuningfrequency bandwidth of said tuning amplifier section.
 19. The tuningcircuit of claim 15, wherein the time constant of said series circuit isvaried to control the tuning characteristic.
 20. The tuning circuit ofclaim 19, wherein said first resistor included in said series circuit isa variable resistor capable of controlling the tuning characteristic byadjusting said variable resistor.
 21. The tuning circuit of claim 20,wherein said variable resistor is formed by a parallel connection ofp-channel and n-channel FETs whose channel resistances are varied bycontrolling their gate voltage.
 22. The tuning circuit of claim 15,wherein a transistor follower circuit is interposed between said pair ofphase shifting circuits and said adding circuit.
 23. The tuning circuitof claim 15, wherein said fourth resistor is removed.
 24. The tuningcircuit of claim 15, wherein said inductor included in said seriescircuit is formed on a semiconductor substrate and has a pair of spiralelectrodes magnetically coupled to each other by way of a magneticmember with one electrode flowing a variable DC bias current to controlthe inductance of the other electrode.
 25. The tuning circuit of claim15, wherein said capacitor included in said series circuit comprises anamplifier having a negative gain and a capacitor element connectedbetween the input and output of said amplifier to constitute acapacitance converter circuit.
 26. The tuning circuit of claim 15,wherein said inductor included in said series circuit comprises anamplifier having a gain set between 0 to 1 and an inductor elementconnected between the input and output of said amplifier to constitutean inductance converter circuit.
 27. A tuning circuit including aplurality of cascade connected tuning amplifier sections having theirtuning frequencies shifted by a given frequency, each of said tuningamplifier sections comprising:an adding circuit for adding an inputsignal applied to one end of an input impedance element and a feedbacksignal applied to one end of a feedback impedance element; a pair ofphase shifting circuits of opposite phase shift directions to each otherand including a series circuit of a first resistor and a capacitor or aninductor, and a differential input amplifier; and a first voltagedividing circuit for dividing an input AC signal by a predetermineddividing ratio; wherein said pair of phase shifting circuits and saidfirst voltage dividing circuit are connected in a cascade manner, theadded signal from said adding circuit is applied to the first stagecircuit of said plurality of cascade connected circuits, an outputsignal from the final stage circuit is applied to the one end of saidfeedback impedance element as the feedback signal, and the signal to beapplied to said voltage dividing circuit is derived as the outputsignal, wherein at least one of said pair of phase shifting circuitscomprises a second resistor connected to the inverting input terminal ofsaid differential input amplifier to receive an AC signal therethrough,a second voltage dividing circuit connected to the output terminal ofsaid differential input amplifier, a third resistor coupled between theoutput terminal of said second voltage dividing circuit and theinverting input terminal of said differential input amplifier, and saidseries circuit, and wherein the junction point of said first resistorand said capacitor or said inductor constituting said series circuit isconnected to the non-inverting input terminal of said differential inputamplifier.
 28. The tuning circuit of claim 27, wherein the dividingratio of said first voltage dividing circuit is set to
 1. 29. The tuningcircuit of claim 27, wherein said differential input amplifier comprisesan operational amplifier.
 30. The tuning circuit of claim 27, whereinsaid second and third resistors are chosen to have an equal resistance.31. The tuning circuit of claim 27, wherein said input and feedbackimpedance elements are resistors having a variable resistance ratio tocontrol the tuning frequency bandwidth of said tuning amplifier section.32. The tuning circuit of claim 27, wherein the time constant of saidseries circuit is varied to control the tuning characteristic.
 33. Thetuning circuit of claim 32, wherein said first resistor included in saidseries circuit is a variable resistor to provide a variable resistance,thereby controlling the tuning characteristic.
 34. The tuning circuit ofclaim 33, wherein said variable resistor is formed by a parallelconnection of p-channel and n-channel FETs to provide variable channelresistances depending on the gate voltage.
 35. The tuning circuit ofclaim 27, wherein a transistor follower circuit is interposed betweensaid pair of phase shifting circuits and said adding circuit.
 36. Thetuning circuit of claim 27, wherein the dividing ratio of said secondvoltage dividing circuit is set to
 1. 37. The tuning circuit of claim27, wherein said inductor included in said series circuit has two spiralelectrodes magnetically coupled to each other by way of a magneticmember with a variable DC bias current applied to one electrode whilethe other electrode providing a variable inductance.
 38. The tuningcircuit of claim 27, wherein said capacitor included in said seriescircuit is formed on a semiconductor substrate and comprises anamplifier having a negative gain, and a capacitor element connectedbetween the input and output of said amplifier to constitute acapacitance converter circuit.
 39. The tuning circuit of claim 27,wherein said inductor included in said series circuit comprises anamplifier having a gain set between 0 to 1 and an inductor elementconnected between the input and output of said amplifier to constitutean inductance converter circuit.
 40. The tuning circuit of claim 27,wherein at least one of said pair of phase shifting circuits includes asecond resistor connected to the inverting input terminal of saiddifferential input amplifier through which an AC signal is applied, athird resistor connected between the inverting input terminal and theoutput terminal of said differential input amplifier, a fourth resistorcoupled between the inverting input terminal of said differential inputamplifier and ground and said series circuit, and wherein the junctionpoint of said first resistor and said capacitor or inductor constitutingsaid series circuit is connected to the non-inverting input terminal ofsaid differential input amplifier.
 41. The tuning circuit of claim 40,wherein said differential input amplifier comprises an operationalamplifier.
 42. The tuning circuit of claim 40, wherein the resistance ofsaid third resistor is set larger than that of said second resistor. 43.The tuning circuit of claim 40, wherein said input and feedbackimpedance elements are resistors with their resistance ratio variablefor controlling the tuning frequency bandwidth of said tuning amplifiersection.
 44. The tuning circuit of claim 40, wherein the time constantof said series circuit is varied to control the tuning characteristic.45. The tuning circuit of claim 44, wherein said first resistor includedin said series circuit is a variable resistor to provide a variableresistance for controlling the tuning characteristic.
 46. The tuningcircuit of claim 45, wherein said variable resistor comprises a parallelconnection of p-channel and n-channel FETs to vary their channelresistances depending on the gate voltage.
 47. The tuning circuit ofclaim 40, wherein a transistor follower circuit is interposed betweensaid pair of phase shifting circuits and said adding circuit.
 48. Thetuning circuit of claim 40, wherein said fourth resistor is eliminated.49. The tuning circuit of claim 40, wherein said inductor included insaid series circuit is formed on a semiconductor substrate and includesa pair of spiral electrodes magnetically coupled together by way of amagnetic member with a variable DC bias current flowing in one electrodewhile varying the inductance of the other electrode.
 50. The tuningcircuit of claim 40, wherein said capacitor included in said seriescircuit comprises an amplifier having a negative gain and a capacitorelement connected between the input and output of said amplifier toconstitute a capacitance converter circuit.
 51. The tuning circuit ofclaim 40, wherein said inductor included in said series circuitcomprises an amplifier having a gain set between 0 and 1 and an inductorelement connected between the input and output of said amplifier toconstitute an inductance converter circuit.
 52. The tuning circuit ofany one of claims 3 through 27 and 29 through 51, wherein allconstituent components are integrally formed on a semiconductorsubstrate.
 53. The tuning circuit of claim 1, wherein the dividing ratioof said first voltage dividing circuit is set to
 1. 54. The tuningcircuit of any one of claims 53, and 28, wherein all constituentcomponents are integrally formed on a semiconductor substrate.